Product Summary
The MC68HC705J2CP is a low-cost, high-performance 8-bit microcontroller unit. It is based on the customer-specified integrated circuit (CSIC) design strategy. The MC68HC705J2CP uses the popular M68HC05 central processor unit (CPU) and is available with a variety of subsystems, memory sizes and types, and package types. On-chip memory is enhanced with 2 Kbytes of erasable, programmable ROM (EPROM), 112 Kbytes of RAM, and a bootloader ROM.
Parametrics
MC68HC705J2CP absolute maximum ratings: (1)Supply Voltage:-0.3V to +7.0V; (2)Input Voltage: All Pins in Normal Operation:VSS-0.3V to VDD+0.3V, IRQ/VPP Pin in Bootloader Mode:VSS-0.3V to 2*VDD+0.3V; (3)EPROM Programming Voltage (IRQ/VPP Pin): 16.75V; (4)Current Drain Per Pin (ExcludingVDD and VSS):25mA; (5)Operating Temperature Range:-40℃ to +85℃; (6)Storage Temperature Range:-65℃ to +150℃.
Features
MC68HC705J2CP features: (1)Popular M68HC05 CPU; (2)Memory-Mapped Input/Output (I/O) Registers; (3)2064 Bytes of User EPROM Including 16 User Vector Locations; (4)112 Bytes of Static RAM (SRAM); (5)14 Bidirectional I/O Pins; (6)Fully Static Operation With No Minimum Clock Speed; (7)On-Chip Oscillator With Crystal/Ceramic Resonator Connections; (8)15-Bit Multifunction Timer; (9)Real-Time Interrupt Circuit; (10)Bootloader ROM; (11)Power-Saving STOP, WAIT, and Data Retention Modes; (12)MC68HC05J1 Emulation Mode; (13)Selectable Edge-Sensitive or Edge- and Level-Sensitive External Interrupt Trigger; (14)Selectable Computer Operating Properly (COP) Timer; (15)8 x 8 Unsigned Multiply Instruction; (16)One Time Programmable 20-Pin Dual-in-Line Package (DIP).
Diagrams
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Data Sheet |
Negotiable |
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Freescale Semiconductor |
Microprocessors (MPU) 32-BIT MPU |
Data Sheet |
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Microprocessors (MPU) 32-BIT MPU |
Data Sheet |
Negotiable |
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Freescale Semiconductor |
Microprocessors (MPU) 32-BIT MPU |
Data Sheet |
Negotiable |
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