(China (Mainland))
Product Summary
XC4013E-3HQ208I belongs to high-performance, high-capacity Field Programmable Gate Arrays (FPGAs)which provides the benefits of custom CMOS VLSI, while avoiding the initial cost, long development cycle, and inherent risk of a conventional masked gate array.
Parametrics
XC4013E-3HQ208I absolute maxing ratings: (1)Power-On Reset M0 = High TPOR: min=10ms, max=40ms; M0 = Low TPOR: min=40ms, max=130ms; (2)Program Latency TPI: min=30μs per CLB column, max=200μs per CLB column; (3)CCLK (output) Delay TICCK: min=40μs, max=250μs; (4)CCLK (output) Period, slow TCCLK: min=640ns, max=2000ns; (5)CCLK (output) Period, fast TCCLK: min=80ns, max=250ns.
Features
XC4013E-3HQ208I features: (1)System Performance beyond 80 MHz; (2)Flexible Array Architecture; (3)Low Power Segmented Routing Architecture; (4)Systems-Oriented Features: IEEE 1149.1-compatible boundary scan logic support; Individually programmable output slew rate; Programmable input pull-up or pull-down resistors; 12 mA sink current per XC4000E output; (5)Configured by Loading Binary File: Unlimited re-programmability; (6)Read Back Capability: Program verification; Internal node observability.
Diagrams
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 XC4013E-3HQ208I |
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IC FPGA I-TEMP 5V 3SPD 208-HQFP |
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Negotiable |
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XC4000 |
Other |
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Negotiable |
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XC4000A |
Other |
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Negotiable |
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XC4000E |
Other |
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Negotiable |
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XC4000H |
Other |
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Data Sheet |
Negotiable |
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XC4000X |
Other |
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Negotiable |
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XC4000XL |
Other |
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Negotiable |
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